MIPS relocation types

From Dmz-portal

Jump to: navigation, search

Contents

O32/N32 Relocation Structure for SHT_REL/SHT_RELA

Name Type Description
r_offset Elf32_Addr Address
r_info Elf32_Word Relocation type and symbol index
r_addend Elf32_Word Addend (SHT_RELA only)


O64 Relocation Structure for SHT_REL/SHT_RELA

Name Type Description
r_offset Elf64_Addr Address
r_info Elf64_Word Relocation type and symbol index
r_addend Elf32_Sxword Addend (SHT_RELA only)

N64 Relocation Structure for SHT_REL, SHT_RELA

Name Type Description
r_offset Elf64_Addr Where to apply relocation:
 Relocatable: byte offset in section
 Executable: virtual address
r_sym Elf64_Word Symbol index
r_ssym Elf64_Byte Special symbol
r_type3 Elf64_Byte Relocation type
r_type2 Elf64_Byte Relocation type
r_type Elf64_Byte Relocation type
r_addend Elf64_Sxword Addend (SHT_RELA only)


The following MIPS relocation types are based on FSF binutils src/include/elf/mips.h checked out at at 5/17, 2012 (revision 1.46). Also, relocation wording and specifications have been borrowed from the 64-bit ELF Object File Specification Draft Version 2.5 from MIPS Technologies/Silicon Graphics Computer Systems.

Relocation Operands

Operand Description
A Represents an addend obtained as the value of the field being relocated prior to relocation (.rel), from a .rela addend field, or as the preceding result for a composed relocation (either).
AHL An address addend formed as follows. In .rela sections, it is identical to an A addend. In a .rel section, a pair of adjacent relocations, one a hi16 and the other a lo16, each provide a 16-bit partial addend. The hi16 halfword is shifted left 16 bits, the lo16 halfword is sign extended, and the two resulting values are added. (The two relocations

need not actually be adjacent in a .rel section -- a single hi16 addend may be used with multiple lo16 addends -- but processing this combination requires fallable heuristics, so these relocations should not be used in .rel sections.)

P The place (section offset or address) of the storage unit being relocated (computed using r_offset).
S The value of the symbol whose index resides in the relocation entry, unless the symbol is STB_LOCAL of type STT_SECTION, in which case S represents the final sh_addr minus the original sh_addr.
G The offset into the global offset table at which the address of the relocation entry symbol, adjusted by the addend, resides during execution.
GP The final gp value to be used for the relocatable, executable, or DSO being produced.
GP0 The gp value used to create the relocatable object.
EA The effective address of the symbol prior to relocation.
L The mapping table offset of a merged section, e.g. .lit4. Prior to relocation, the addend field (in the instruction) contains an offset into the object’s global data area. During relocation, the sections are merged, removing duplicate entries, and a mapping table is constructed to map the original offsets to the new offsets.
DTP_OFFSET This is 0x8000 for 32 bit (needs better description and 64 bit value)
TP_OFFSET This is 0x7000 for 32 bit (needs better description and 64 bit value)


The actual relocation operations supported are described below in the Relocation Table. The name and value columns are the relocation type, which is one of the r_type* fields. The field column specifies the affected field of the storage unit being relocated (only for the last operation in a composed relocation sequence). The "T_" prefix indicates that excess high-order bits are to be truncated; the "V_" prefix indicates that the value is verified to fit in the field, with an error generated if it does not. The symbol column specifies the kind of symbol to which the description applies.
Any of the relocation types may appear in either a SHT_REL or a SHT_RELA relocation section, except that relocation types involving AHL operands are forbidden in a 64-bit SHT_REL section and discouraged in a 32-bit SHT_REL section. In the latter case, they WILL NOT BE SUPPORTED unless the ordering constraints imposed by table footnote (b) are observed. Also note that some relocations (e.g. R_MIPS_HIGHER, R_MIPS_HIGHEST) will normally be impossible to specify in a SHT_REL section unless the required addend is small. An SHT_RELA section must also be used for such relocations if the required addend could become too large for its field in an ld -r partial link, even if the value is small as generated by the original object file producer.
Several of the original MIPS relocation types may be used only for the operation implied, and not for the field specified, in a multi-operation sequence as described above. The name fields for those types are shaded, and some are given alternate names in the table below to emphasize the alternate interpretation.

Symbol Types

Symbol Description
local A local symbol is one with binding STB_LOCAL and type STT_SECTION
external non-local symbol

Relocation Table

Name Id Field Symbol Calculation
R_MIPS_NONE 0 none n/a none
R_MIPS_16 1 V-half16 any S + sign_extend(A)
R_MIPS_32

R_MIPS_ADD

2 T-word32 any S+A
R_MIPS_REL_32

R_MIPS_REL

3 T-word32 any S + A - EA
R_MIPS_26 4 T-targ26 local

external

((A | ((P + 4) & 0xf0000000)) + S) >> 2


(sign_extend(A) + S) >> 2

R_MIPS_HI16 5 T-T-hi16 any  %high(AHL + S)

The %high(x) function is ( x - (short)x ) >> 16

R_MIPS_LO16 6 T-T-lo16 any AHL + S
R_MIPS_GPREL16

R_MIPS_GPREL

7 V-rel16 local

external

sign_extend(A) + S + GP0 - GP

sign_extend(A) + S - GP

R_MIPS_LITERAL 8 V-lit16 local sign_extend(A) + L
R_MIPS_GOT16

R_MIPS_GOT

9 V-rel16 local

external

See description

G

R_MIPS_PC16 10 V-pc16 external (sign_extend(A) + S - P) >> 2
R_MIPS_CALL16

R_MIPS_CALL

11 V-rel16 external G
R_MIPS_GPREL32 12 T-word32 local A + S + GP0 - GP
R_MIPS_SHIFT5 16 V-sh5 any (S + A) & 0x7c0
R_MIPS_SHIFT6 17 V-sh6 any

(((S + A) & ~20) | (((S + A) & 0x20) >> 2 >> & 0x7c4

R_MIPS_64 18 T-word64 any S + A
R_MIPS_GOT_DISP 19 V-rel16 any G
R_MIPS_GOT_PAGE 20 V-rel16 any G (See description)
R_MIPS_GOT_OFST 21 V-rel16 any G (See description)
R_MIPS_GOT_HI16 22 T-hi16 any  %high(G)

The %high(x) function is ( x - (short)x ) >> 16.

R_MIPS_GOT_LO16 23 T-lo16 any G
R_MIPS_SUB 24 T-word64 any S - A
R_MIPS_INSERT_A 25 T-word32 any Insert addend as instruction immediately prior to addressed location.

See description

R_MIPS_INSERT_B 26 T-word32 any Insert addend as instruction immediately prior to addressed location.

See description

R_MIPS_DELETE 27 T-word32 any Remove the addressed 32-bit object (normally an instruction).

See description

R_MIPS_HIGHER 28 T-hi16 any  %higher(A + S)

The %higher(x) function is [ (((long long) x + 0x80008000LL) >> 32) & 0xffff ].

R_MIPS_HIGHEST 29 T-hi16 any  %highest(A+S)

The %highest(x) function is [ (((long long) x + 0x800080008000LL) >> 48) & 0xffff ].

R_MIPS_CALL_HI16 30 T-hi16 any  %high(G)

The %high(x) function is ( x - (short)x ) >> 16.

R_MIPS_CALL_LO16 31 T-lo16 any G
R_MIPS_SCN_DISP 32 T-word32 any S+A-scn_addr

(Section displacement) See description

R_MIPS_REL16 33 V-hw16 any S+A
R_MIPS_ADD_IMMEDIATE 34 V-half16 any S + sign_extend(A)

Obsolete

R_MIPS_PJUMP 35 T-word32 any Deprecated (protected jump) do nothing
R_MIPS_RELGOT 36 T-word32 any S + A - EA

See description

R_MIPS_JALR 37 T-word32 any Protected jump conversion

See description

R_MIPS_TLS_DTPMOD32 38 xx any x
R_MIPS_TLS_DTPREL32 39 T-word32 any S + A – DTP_OFFSET
R_MIPS_TLS_DTPMOD64 40 xx any x
R_MIPS_TLS_DTPREL64 41 xx any x
R_MIPS_TLS_GD 42 V-rel16 any G
R_MIPS_TLS_LDM 43 V-rel16 any G
R_MIPS_TLS_DTPREL_HI16 44 V-hi16 any  %high(S + A - DTP_OFFSET)

The %high(x) function is (x - (short)x) >> 16

R_MIPS_TLS_DTPREL_LO16 45 V-lo16 any (S + A - DTP_OFFSET) & 0xffff
R_MIPS_TLS_GOTTPREL 46 V - rel16 any G
R_MIPS_TLS_TPREL32 47 T-word32 any S + A - TP_OFFSET
R_MIPS_TLS_TPREL64 48 xx any S + A - TP_OFFSET
R_MIPS_TLS_TPREL_HI16 49 V-hi16 any  %high(S + A - TP_OFFSET)

The %high(x) function is (x - (short)x) >> 16

R_MIPS_TLS_TPREL_LO16 50 V-lo16 any (S + A - TP_OFFSET) & 0xffff
R_MIPS_GLOB_DAT 51 xx any Dynamic linker relocation

Used to initialized a GOT entry to the address of a symbol defined in another library

R_MIPS_PC10 (obsolete) 52 V-pc10 external sign_extend(A) + S - P
R_MIPS_PC21_S2 60 V-pc21 any (sign_extend(A) + S - P) >> 2
R_MIPS_PC26_S2 61 V-pc26 any (sign_extend(A) + S - P) >> 2
R_MIPS_PC18_S3 62 V-pc18 any (sign_extend(A) + S - (P & ~0x7)) >> 3

Both addend and symbol must be 8-byte aligned

R_MIPS_PC19_S2 63 V-pc19 any (sign_extend(A) + S - (P & ~0x3)) >> 2

Both addend and symbol must be 4-byte aligned

R_MIPS_PCHI16 64 T-pchi16 any  %high(AHL + S - P)
R_MIPS_PCLO16 65 T-pclo16 any AHL + S - P
R_MIPS16_26 100 T-targ26 local

external

((A | ((P + 4) & 0xf0000000)) + S) >> 2


(sign_extend(A) + S) >> 2

R_MIPS16_GPREL 101 V-rel16 local

external

sign_extend(A) + S + GP0 - GP

sign_extend(A) + S - GP

R_MIPS16_GOT16 102 xx any x
R_MIPS16_CALL16 103 xx any x
R_MIPS16_HI16 104 xx any x
R_MIPS16_LO16 105 xx any x
R_MIPS16_TLS_GD 106 xx any x
R_MIPS16_TLS_LDM 107 xx any x
R_MIPS16_TLS_DTPREL_HI16 108 xx any x
R_MIPS16_TLS_DTPREL_LO16 109 xx any x
R_MIPS16_TLS_GOTTPREL 110 xx any x
R_MIPS16_TLS_TPREL_HI16 111 xx any x
R_MIPS16_TLS_TPREL_LO16 112 xx any x
R_MIPS16_PC16_S1 113 V-pc16 external (sign_extend(A) + S - P) >> 1
R_MIPS_COPY 126 xx any Dynamic linker relocation
R_MIPS_JUMP_SLOT 127 xx any Dynamic linker relocation

Used to initialize GOT entries for the PLT

R_MICROMIPS_26_S1 133 T-targ26 local (no cross-mode)

external (no cross-mode)


local (cross-mode)


external (cross-mode)

(((A << 1) | ((P + 4) & 0xf8000000)) + S) >> 1


(sign_extend(A << 1) + S) >> 1


((A | ((P + 4) & 0xf0000000)) + S) >> 2


(sign_extend(A) + S) >> 2

R_MICROMIPS_HI16 134 xx any x
R_MICROMIPS_LO16 135 xx any x
R_MICROMIPS_GPREL16 136 V-rel16 local

external

sign_extend(A) + S + GP0 - GP

sign_extend(A) + S - GP

R_MICROMIPS_LITERAL 137 xx any x
R_MICROMIPS_GOT16 138 xx any x
R_MICROMIPS_PC7_S1 139 xx any x
R_MICROMIPS_PC10_S1 140 xx any x
R_MICROMIPS_PC16_S1 141 xx any x
R_MICROMIPS_CALL16 142 xx any x
R_MICROMIPS_GOT_DISP 145 xx any x
R_MICROMIPS_GOT_PAGE 146 xx any x
R_MICROMIPS_GOT_OFST 147 xx any x
R_MICROMIPS_GOT_HI16 148 xx any x
R_MICROMIPS_GOT_LO16 149 xx any x
R_MICROMIPS_SUB 150 xx any x
R_MICROMIPS_HIGHER 151 xx any x
R_MICROMIPS_HIGHEST 152 xx any x
R_MICROMIPS_CALL_HI16 153 xx any x
R_MICROMIPS_CALL_LO16 154 xx any x
R_MICROMIPS_SCN_DISP 155 xx any x
R_MICROMIPS_JALR 156 xx any x
R_MICROMIPS_HI0_LO16 157 xx any x
R_MICROMIPS_PCHI16 158 T-pchi16 any  %high(AHL + S - P)
R_MICROMIPS_PCLO16 159 T-pclo16 any AHL + S - P
R_MICROMIPS_TLS_GD 162 xx any x
R_MICROMIPS_TLS_LDM 163 xx any x
R_MICROMIPS_TLS_DTPREL_HI16 164 xx any x
R_MICROMIPS_TLS_DTPREL_LO16 165 xx any x
R_MICROMIPS_TLS_GOTTPREL 166 xx any x
R_MICROMIPS_TLS_TPREL_HI16 169 xx any x
R_MICROMIPS_TLS_TPREL_LO16 170 xx any x
R_MICROMIPS_GPREL7_S2 172 V-rel local

external

(sign_extend(A) + S + GP0 - GP) >> 2

(sign_extend(A) + S - GP) >> 2

R_MICROMIPS_PC23_S2 173 xx any x
R_MICROMIPS_PC21_S2 174 V-pc21 any (sign_extend(A) + S - P) >> 2
R_MICROMIPS_PC26_S2 175 V-pc26 any (sign_extend(A) + S - P) >> 2
R_MICROMIPS_PC18_S3 176 V-pc18 any (sign_extend(A) + S - (P & ~0x7)) >> 3

Both addend and symbol must be 8-byte aligned

R_MICROMIPS_PC19_S2 177 V-pc19 any (sign_extend(A) + S - (P & ~0x3)) >> 2

Both addend and symbol must be 4-byte aligned

R_MIPS_PC32 248 T-word32 any S+A-P
R_MIPS_EH 249 xx any x
R_MIPS_GNU_REL16_S2 250 V-rel16 any S+sign_extend(A)-P
R_MIPS_GNU_VTINHERIT 253 xx any x
R_MIPS_GNU_VTENTRY 254 xx any x
xx xx any x

Relocation Detail

R_MIPS_NONE

R_MIPS_16

R_MIPS_32

R_MIPS_REL32

R_MIPS_26

R_MIPS_HI16

An R_MIPS_HI16 must be followed eventually by an associated R_MIPS_LO16 relocation record in the same SHT_REL section. The contents of the two fields to be relocated are combined to form a full 32-bit addend AHL. An R_MIPS_LO16 entry which does not immediately follow a R_MIPS_HI16 is combined with the most recent one encountered, i.e. multiple R_MIPS_LO16 entries may be associated with a single R_MIPS_HI16. Use of these relocation types in a SHT_REL section is discouraged and may be forbidden to avoid this complication.

A GNU extension allows multiple R_MIPS_HI16 records to share the same R_MIPS_LO16 relocation record(s). The association works like this within a single relocation section:

From the beginning of the section moving to the end of the section, until R_MIPS_LO16 is not found each found R_MIPS_HI16 relocation will be associated with the first R_MIPS_LO16.
Until another R_MIPS_HI16 record is found all found R_MIPS_LO16 relocations found are associated with the last R_MIPS_HI16.

The special symbol name _gp_disp, used for relocating the calculation of gp on entry to a DSO in 32-bit files, is not supported in ELF-64 or in the new 32-bit ABI. Instead, these relocations should be composed with R_MIPS_GPREL applied to an explicit symbol for the entry point of the subprogram. See the examples below.

R_MIPS_LO16

R_MIPS_GPREL16

R_MIPS_LITERAL

Because LD and GOLD don’t merge literal sections calculations for this relocation is done in same way as in R_MIPS_GPREL16

R_MIPS_GOT16

The first instance of an R_MIPS_GOT* or an R_MIPS_CALL* relocation causes the linker to build a global offset table if it has not already done so.

Relocation must be followed immediately with an R_MIPS_LO16 relocation. Calculation is done in a same way as in R_MIPS_HI16.

R_MIPS_PC16

R_MIPS_CALL16

The first instance of an R_MIPS_GOT* or an R_MIPS_CALL* relocation causes the linker to build a global offset table if it has not already done so.

The difference between the R_MIPS_CALL* operators and the corresponding R_MIPS_GOT* operators is that the former allow initial resolution by rld to a lazy evaluation stub, whereas the latter must be resolved to the ultimate address at initialisation.

R_MIPS_GPREL32

R_MIPS_UNUSED1

R_MIPS_UNUSED24

R_MIPS_UNUSED3

R_MIPS_SHIFT5

R_MIPS_SHIFT6

R_MIPS_64

R_MIPS_GOT_DISP

R_MIPS_GOT_PAGE

For these relocations, ld generates a page pointer in the GOT, i.e. an address within 32KB of (S+A).

They are placed at small offsets from gp (i.e. within 32KB).

R_MIPS_GOT_PAGE produces the GOT offset of the page pointer, and R_MIPS_GOT_OFST produces the offset of (S+A) from the page pointer.

R_MIPS_GOT_OFST

See R_MIPS_GOT_PAGE above.

R_MIPS_GOT_HI16

     value = (mips_elf_high (g)) & howto->dst_mask

R_MIPS_GOT_LO16

     value = g & howto->dst_mask;

R_MIPS_SUB

R_MIPS_INSERT_A

References to that location elsewhere are unchanged (i.e. they reference the new instruction) for the A form, or refer to the moved instruction for the B form.

Relocations which follow an insertion relocation in the same record, or in consecutive records with a zero offset, reference the inserted instruction. Relocation records which follow with the same non-zero offset refer to the original operation at that address. This requires careful ordering or dummy intervening relocations if multiple relocations including insertions are to be applied to the first location in a section.

R_MIPS_INSERT_B

See R_MIPS_INSERT_A above

R_MIPS_DELETE

References to the deleted address elsewhere are unchanged (i.e. they become references to the following object, which moves to the deleted address).

R_MIPS_HIGHER

R_MIPS_HIGHEST

R_MIPS_CALL_HI16

R_MIPS_CALL_LO16

R_MIPS_SCN_DISP

An R_MIPS_SCN_DISP relocation is intended for address reset records in an Event Location section (see Section 2.10).

Prior to relocation in the linker, the low-order 31 bits contains an offset from the beginning of the section referenced by the Event Location section’s sh_link field. As the referenced sections and their associated Event Location sections are concatenated, these offsets must be updated to be relative to the merged section start address. Thus, "scn_addr" in the expression is the starting address of the section where the symbol is defined.

R_MIPS_REL16

R_MIPS_ADD_IMMEDIATE

R_MIPS_PJUMP

R_MIPS_RELGOT

An R_MIPS_RELGOT relocation is the same as an R_MIPS_REL relocation, but relocates an entry in a GOT section and must be used for multigot GOTs (and only there).

R_MIPS_JALR

An R_MIPS_JALR relocation is intended for optimization of jumps to protected symbols, i.e. symbols which may not be preempted. The word to be relocated is a jump (typically a JALR) to the indicated symbol. If it is not a preemptible symbol (and therefore defined in the current executable/DSO) the relocation is a request to the linker to convert it to a direct branch (typically a JAL in the main executable, or a BGEZAL in DSOs if the target symbol is close enough). The linker must check that the symbol is not preemptible before performing the relocation, but no action is required for correctness -- this is strictly an optimization hint.

R_MIPS_TLS_DTPMOD32

R_MIPS_TLS_DTPREL32

R_MIPS_TLS_DTPMOD64

R_MIPS_TLS_DTPREL64

R_MIPS_TLS_GD

R_MIPS_TLS_LDM

R_MIPS_TLS_DTPREL_HI16

     value = (mips_elf_high (addend + symbol - dtprel_base (info)) & howto->dst_mask);

R_MIPS_TLS_DTPREL_LO16

     value = (symbol + addend - dtprel_base (info)) & howto->dst_mask;

R_MIPS_TLS_GOTTPREL

R_MIPS_TLS_TPREL32

See  R_MIPS_TLS_TPREL_LO16

R_MIPS_TLS_TPREL64

See  R_MIPS_TLS_TPREL_LO16

R_MIPS_TLS_TPREL_HI16

     value = (mips_elf_high (addend + symbol - tprel_base (info)) & howto->dst_mask);

R_MIPS_TLS_TPREL_LO16

     value = (symbol + addend - tprel_base (info)) & howto->dst_mask;

R_MIPS_GLOB_DAT

R_MIPS_PC10 (obsolete)

This relocation type is created for a new type of branches with only 10-bit offsets that are from bit 11 to bit 20. Similar to R_MIPS_PC16. NOTE: We will remove this relocation type and reuse this relocation number (52), as the new type of branches is dropped.

R_MIPS_max

52 (Fake, used as a mark)

R_MIPS16_min

100 (Fake, used as a mark)

   The table below lists the other MIPS16 instruction relocations.
   Each one is calculated in the same way as the non-MIPS16 relocation
   given on the right, but using the extended MIPS16 layout of 16-bit
   immediate fields:

	R_MIPS16_GPREL		R_MIPS_GPREL16
	R_MIPS16_GOT16		R_MIPS_GOT16
	R_MIPS16_CALL16		R_MIPS_CALL16
	R_MIPS16_HI16		R_MIPS_HI16
	R_MIPS16_LO16		R_MIPS_LO16

   A typical instruction will have a format like this:

   +--------------+--------------------------------+
   |    EXTEND    |     Imm 10:5    |   Imm 15:11  |
   +--------------+--------------------------------+
   |    Major     |   rx   |   ry   |   Imm  4:0   |
   +--------------+--------------------------------+

   EXTEND is the five bit value 11110.  Major is the instruction
   opcode.

   All we need to do here is shuffle the bits appropriately.
   As above, the two 16-bit halves must be swapped on a
   little-endian system.  */

R_MIPS16_26

bfd/:
2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>
 /* R_MIPS16_26 is used for the mips16 jal and jalx instructions.
    Most mips16 instructions are 16 bits, but these instructions
    are 32 bits.
 
    The format of these instructions is:
 
    +--------------+--------------------------------+
    |     JALX     | X|   Imm 20:16  |   Imm 25:21  |
    +--------------+--------------------------------+
    |                Immediate  15:0                |
    +-----------------------------------------------+
 
    JALX is the 5-bit value 00011.  X is 0 for jal, 1 for jalx.
    Note that the immediate value in the first word is swapped.
 
    When producing a relocatable object file, R_MIPS16_26 is
    handled mostly like R_MIPS_26.  In particular, the addend is
    stored as a straight 26-bit value in a 32-bit instruction.
    (gas makes life simpler for itself by never adjusting a
    R_MIPS16_26 reloc to be against a section, so the addend is
    always zero).  However, the 32 bit instruction is stored as 2
    16-bit values, rather than a single 32-bit value.  In a
    big-endian file, the result is the same; in a little-endian
    file, the two 16-bit halves of the 32 bit value are swapped.
    This is so that a disassembler can recognize the jal
    instruction.
 
    When doing a final link, R_MIPS16_26 is treated as a 32 bit
    instruction stored as two 16-bit values.  The addend A is the
    contents of the targ26 field.  The calculation is the same as
    R_MIPS_26.  When storing the calculated value, reorder the
    immediate value as shown above, and don't forget to store the
    value as two 16-bit values.
 
    To put it in MIPS ABI terms, the relocation field is T-targ26-16,
    defined as
 
    big-endian:
    +--------+----------------------+
    |        |                      |
    |        |    targ26-16         |
    |31    26|25                   0|
    +--------+----------------------+
 
    little-endian:
    +----------+------+-------------+
    |          |      |             |
    |  sub1    |      |     sub2    |
    |0        9|10  15|16         31|
    +----------+--------------------+
    where targ26-16 is sub1 followed by sub2 (i.e., the addend field A is
    ((sub1 << 16) | sub2)).
 
    When producing a relocatable object file, the calculation is
    (((A < 2) | ((P + 4) & 0xf0000000) + S) >> 2)
    When producing a fully linked file, the calculation is
    let R = (((A < 2) | ((P + 4) & 0xf0000000) + S) >> 2)
    ((R & 0x1f0000) << 5) | ((R & 0x3e00000) >> 5) | (R & 0xffff)

R_MIPS16_GPREL

2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>
   R_MIPS16_GPREL is used for GP-relative addressing in mips16
   mode.  A typical instruction will have a format like this:

   +--------------+--------------------------------+
   |    EXTEND    |     Imm 10:5    |   Imm 15:11  |
   +--------------+--------------------------------+
   |    Major     |   rx   |   ry   |   Imm  4:0   |
   +--------------+--------------------------------+

   EXTEND is the five bit value 11110.  Major is the instruction
   opcode.

   This is handled exactly like R_MIPS_GPREL16, except that the
   addend is retrieved and stored as shown in this diagram; that
   is, the Imm fields above replace the V-rel16 field.

   All we need to do here is shuffle the bits appropriately.  As
   above, the two 16-bit halves must be swapped on a
   little-endian system.

R_MIPS16_GOT16

R_MIPS16_CALL16

R_MIPS16_HI16

2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>
  R_MIPS16_HI16 and R_MIPS16_LO16 are used in mips16 mode to
  access data when neither GP-relative nor PC-relative addressing
  can be used.  They are handled like R_MIPS_HI16 and R_MIPS_LO16,
  except that the addend is retrieved and stored as shown above
  for R_MIPS16_GPREL.

R_MIPS16_LO16

2005-02-15  Nigel Stephens  <nigel@mips.com>
            Maciej W. Rozycki  <macro@mips.com>
  R_MIPS16_HI16 and R_MIPS16_LO16 are used in mips16 mode to
  access data when neither GP-relative nor PC-relative addressing
  can be used.  They are handled like R_MIPS_HI16 and R_MIPS_LO16,
  except that the addend is retrieved and stored as shown above
  for R_MIPS16_GPREL.

R_MIPS16_TLS_GD

R_MIPS16_TLS_LDM

R_MIPS16_TLS_DTPREL_HI16

See  R_MIPS_TLS_DTPREL_HI16

R_MIPS16_TLS_DTPREL_LO16

See  R_MIPS_TLS_DTPREL_LO16

R_MIPS16_TLS_GOTTPREL

R_MIPS16_TLS_TPREL_HI16

See  R_MIPS_TLS_TPREL_HI16

R_MIPS16_TLS_TPREL_LO16

See  R_MIPS_TLS_TPREL_LO16

R_MIPS16_PC16_S1

For R_MIPS16_PC16_S1 the calculation is (sign_extend(A) + S - P) >> 1 and the usual MIPS16 bit shuffling applies to relocated field handling, as per the encoding of the branch target in the extended form of the MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions.

R_MIPS16_max

114 (Fake, used as a mark)

R_MIPS_COPY

R_MIPS_JUMP_SLOT

R_MICROMIPS_min

130 (Fake, used as a mark)

R_MICROMIPS_26_S1

R_MICROMIPS_HI16

R_MICROMIPS_LO16

R_MICROMIPS_GPREL16

R_MICROMIPS_LITERAL

R_MICROMIPS_GOT16

R_MICROMIPS_PC7_S1

      value = symbol + _bfd_mips_elf_sign_extend (addend, 8) - p;
      overflowed_p = mips_elf_overflow_p (value, 8);
      value >>= howto->rightshift;
      value &= howto->dst_mask;

R_MICROMIPS_PC10_S1

      value = symbol + _bfd_mips_elf_sign_extend (addend, 11) - p;
      overflowed_p = mips_elf_overflow_p (value, 11);
      value >>= howto->rightshift;
      value &= howto->dst_mask;

R_MICROMIPS_PC16_S1

      value = symbol + _bfd_mips_elf_sign_extend (addend, 17) - p;
      overflowed_p = mips_elf_overflow_p (value, 17);
      value >>= howto->rightshift;
      value &= howto->dst_mask;

R_MICROMIPS_CALL16

R_MICROMIPS_GOT_DISP

R_MICROMIPS_GOT_PAGE

See  R_MIPS_GOT_PAGE

R_MICROMIPS_GOT_OFST

See  R_MIPS_GOT_OFST

R_MICROMIPS_GOT_HI16

See  R_MIPS_GOT_HI16

R_MICROMIPS_GOT_LO16

See  R_MIPS_GOT_LO16

R_MICROMIPS_SUB

See  R_MIPS_SUB

R_MICROMIPS_HIGHER

See  R_MIPS_HIGHER

R_MICROMIPS_HIGHEST

See  R_MIPS_HIGHEST

R_MICROMIPS_CALL_HI16

R_MICROMIPS_CALL_LO16

R_MICROMIPS_SCN_DISP

See  R_MIPS_SCN_DISP

R_MICROMIPS_JALR

See [#R_MIPS_JALR | R_MIPS_JALR]]

R_MICROMIPS_HI0_LO16

R_MICROMIPS_TLS_GD

R_MICROMIPS_TLS_LDM

R_MICROMIPS_TLS_DTPREL_HI16

See  R_MIPS_TLS_DTPREL_HI16

R_MICROMIPS_TLS_DTPREL_LO16

See  R_MIPS_TLS_DTPREL_LO16

R_MICROMIPS_TLS_GOTTPREL

R_MICROMIPS_TLS_TPREL_HI16

See  R_MIPS_TLS_TPREL_HI16

R_MICROMIPS_TLS_TPREL_LO16

See  R_MIPS_TLS_TPREL_LO16

R_MICROMIPS_GPREL7_S2

R_MICROMIPS_PC23_S2

      value = symbol + _bfd_mips_elf_sign_extend (addend, 25) - ((p | 3) ^ 3);
      overflowed_p = mips_elf_overflow_p (value, 25);
      value >>= howto->rightshift;
      value &= howto->dst_mask;

R_MICROMIPS_max

174 (Fake, used as a mark)

R_MIPS_PC32

(From the comment in CodeSourcery's src/include/mips/elf.h)
This was a GNU extension used by embedded-PIC. It was co-opted by mips-linux for exception-handling data. GCC stopped using it in May, 2004, then started using it again for compact unwind tables.
Please check R_MIPS_EH, 249.

R_MIPS_EH

Added by CodeSourcery in this release 2012.03-40. This relocation is described in Section 11, MIPSCompactEH.pdf as follows.
11 Relocations
A new static relocation, R_MIPS_EH, is defined. The semantics of this relocation depend on whether static or dynamic linking is provided.
A GNU extension using relocation number 249 shall be used.
11.1 Static code
For static code generation, the calculation is the same as an R_MIPS_REL32 relocation.
At runtime, the following expression provides the relocated value, if 'ptr' points to the relocation location.

• (ptrdiff_t)ptr + *(int32_t *)ptr


Note that this limits static executables to be no bigger than 2GB in the 64bit ABIs. However, they may be placed at any base address within the memory space.
11.2 PIC code
For PIC code generation, a 32- or 64-bit GOT-table entry must be allocated to refer to the (dynamically resolved) target address. Once the GOT entry has been allocated, the static calculation is as for an R_MIPS_GPREL32 relocation (except that the symbol is externally visible). The GOT-slot has an associated R_MIPS_{32,64} dynamic relocation emitted. At runtime, the following expression provides the relocated value, if 'ptr' points to the relocation location, and 'gp' is the global pointer value:

• *(ptrdiff_t *)((ptrdiff_t)gp + *(int32_t *)ptr)

Note that the GOT is restricted to 2GB in the 64bit ABIs. However, the target address may be placed anywhere in the address space.

R_MIPS_GNU_REL16_S2

R_MIPS_GNU_VTINHERIT

R_MIPS_GNU_VTENTRY

Personal tools
Namespaces
Variants
Actions
Navigation
Toolbox